FPGA Design METHODOLOGY:
Programmable Logic Devices, CPLD Families like Architecture, Xilinx Design Flow, Timing Constraints, Implementation Details, Advanced FPGA Design Tips and Device Programming.
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The projects that have been successfully completed at NAL
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Design and Implementation of PENTIUM based FLOSWITCH
Organization : National Aero Space Laboratories (NAL, Bangalore).
Team size : 5
Duration : 10 Months.
Description:
Flosolver M.K-6 is a distributed computer system based on distributed memory concept and built around 128 Pentium3 Processors, which acts as processing elements (PEs). Communication between processing elements is very important. A switch called Floswitch controls eight Pentium3 processors. To improve High-speed data transfer rate and floating-point computation, the Pentium Processor is proposed to use as C.P.U, and it has the additional features of processing information and provides greater flexibility and power in Large Scale Scientific Computing.
Responsibilities:
v Involved in hardware Design.
v Implementation of VHDL Code for CPLD.
v Tested CPLD signals using 68 channel Logic analyzer.
v Schematics Preparation Using ORCAD design tool
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HDL Implementation of PCI-Bus Protocol.
Organization : National Aero Space Laboratories (NAL, Bangalore).
Team size : 2
Duration : 3 Months.
Description:
Each and every PEs (dual P3 processor) having a PCI-DPM card, which is used to communicate as well as to do transaction between the intra cluster communication So implementation of PCI protocol in FPGA makes Approach easier.
Responsibilities
v Implementation of VHDL code of PCI- Bus protocol in FPGA.
v Testing of FPGA signals using Xilinx ChipScope pro analyzer
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Design and Implementation of Pentium Mobile Processor Based Floswitch
Organization : National Aerospace Laboratories (NAL, Bangalore).
Team size : 6
Duration : 5 Months
Description:
Each and every PEs (dual P3 processor) having a PCI-DPM card, which is used to communicate as well as to do transaction between the intra cluster communication so implementation of PCI protocol in FPGA makes Approach easier.

Responsibilities:
v Involved in hardware Design.
v Initialization of Pentium Mobile Processor in Real and Protected Mode.
v Implementation of VHDL Code for VIRTEX2 PLATFORM FPGA.
v Testing of FPGA signals using Xilinx ChipScope pro analyzer.
v Schematics Preparation Using ORCAD design tool